IBM develops ‘nanostack’ chip architecture

IBM has unveiled a new chip design, referred to as “nanostack” architecture, which will allow the integration of nearly 100 billion transistors on a chip the size of a human fingernail.

The company characterises this as its first sub-1 nanometer chip technology, designed to increase transistor density and improve efficiency for AI-focused data centres.

Redefining chip architecture

To increase density, IBM has moved beyond traditional horizontal layouts. The nanostack architecture vertically stacks transistors in a staggered configuration. Each unit consists of two transistors bonded together, utilising nanosheets that are 5 nanometers thick, separated by a 9-nanometer gap.

Professor Alan Woodward of Surrey University compared this approach to vertical construction. “IBM’s NanoStack is like proposing a 100-story skyscraper,” he says, contrasting it with other 3D chip designs currently in development. While this structural change allows for greater density, designers must still manage the resulting challenges of heat dissipation and electrical switching stability.

Performance gains and future applications

According to IBM’s technical reports, this architecture is projected to provide 50 percent higher performance or 70 percent greater energy efficiency than the company’s previous 2-nanometer generation.

The design also includes a staggered-channel layout for Static Random-Access Memory (SRAM) cells. This modification reduces the overall cell height by 40 percent, addressing recent industry difficulties in scaling memory components, which are essential for the high-bandwidth requirements of AI workloads.

“This achievement of 40 per cent will eventually industrialise itself in AI workflows, which require higher bandwidth and high efficiency,” says Jay Gambetta, director of IBM Research and IBM Fellow. He states that the new architecture points toward a future where computing power can scale without requiring a corresponding increase in energy usage.

Commercial timeline

IBM functions primarily as a research organisation and does not manufacture commercial chips. The company typically licenses its designs to semiconductor foundries, such as its existing partnerships with firms including Rapidus and Samsung.

Huiming Bu, vice president of IBM Semiconductors Global R&D, indicated that while the technology has been demonstrated in research environments, it will take time to reach the market. The company estimates that production of chips based on the nanostack architecture could begin in the next five years, with broad adoption in CPUs and GPUs likely to occur within the next ten years.

“Within a decade, this will become another mainstream that we have invented and helped the industry to transform,” says Bu.